In a joint release published by PR Newswire, UMC and AP Memory announced a technology and manufacturing collaboration on 22 October and said AP Memory’s S-SiCap Gen2D capacitor design had completed tape-out and initial functional validation in the third quarter of 2026.
The companies plan to combine UMC’s deep trench capacitor foundry process and wafer manufacturing with AP Memory’s silicon capacitor designs. They are targeting power delivery for AI and high-performance computing systems. The companies say capacitors can be placed in an advanced package’s interposer, substrate or underside, depending on the system design, bringing power stabilisation closer to the computing die.
UMC and AP Memory plan to test the capacitors’ performance and reliability in substrate packages. They are also exploring capacitor-embedded interposers and capacitors placed beneath the package. UMC says it is investing in additional manufacturing capacity for power delivery and heterogeneous integration. Its 12 operating fabs have combined capacity of more than 400,000 wafers per month, measured in 12-inch wafer equivalents.
